| A 3D Thin Slot Model for Shielding Analysis |
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| 作者姓名： | SUN Da-wei YU Ji-hui |
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| 作者单位： | Key Laboratory of High Voltage Engineering and Electrical New Technology, Ministry of Education, Electrical Engineering College of Chongqing University, Chongqing 400030, China |
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| 摘 要： | The apertures or slots on shielding enclosure are the main factor to influence the shielding performance.The simulation for thin slots in the electromagnetic shielding analysis has been a bottle-neck.Subcellular models of thin slots in the finite-difference time-domain(FDTD) method are investigated.A 3D thin-slot algorithm based on contour path(CP) method is presented for the application to shielding enclosure.The accuracy and the applicability to the slot width are validated with finer mesh model or capacitive thin-slot formalism(C-TSF) for slot models with different width.
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| 关 键 词： | thin slot finite-difference time-domain capacitive thin-slot formalism contour path |
| 收稿时间： | 2006/1/12 0:00:00 |
| 修稿时间： | 2006/1/12 0:00:00 |
A 3D Thin Slot Model for Shielding Analysis |
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| SUN Da-wei,YU Ji-hui.A 3D Thin Slot Model for Shielding Analysis[J].Storage & Process,2006(5):32-35. |
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| Authors: | SUN Da-wei YU Ji-hui |
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| Institution: | Key Laboratory of High Voltage Engineering and Electrical New Technology, Ministry of Education, Electrical Engineering College of Chongqing University, Chongqing 400030, China |
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| Abstract: | The apertures or slots on shielding enclosure are the main factor to influence the shielding performance.The simulation for thin slots in the electromagnetic shielding analysis has been a bottle-neck.Subcellular models of thin slots in the finite-difference time-domain(FDTD) method are investigated.A 3D thin-slot algorithm based on contour path(CP) method is presented for the application to shielding enclosure.The accuracy and the applicability to the slot width are validated with finer mesh model or capacitive thin-slot formalism(C-TSF) for slot models with different width. |
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| Keywords: | thin slot finite-difference time-domain capacitive thin-slot formalism contour path |
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