| 大功率P沟道VDMOS器件设计与工艺仿真 |
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| 引用本文： | 蒲石,杜林,张得玺.大功率P沟道VDMOS器件设计与工艺仿真[J].保鲜与加工,2016(4):133-138. |
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| 作者姓名： | 蒲石 杜林 张得玺 |
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| 作者单位： | 西安电子科技大学 宽禁带半导体材料与器件教育部重点实验室, 西安 710071,西安电子科技大学 宽禁带半导体材料与器件教育部重点实验室, 西安 710071,西安电子科技大学 宽禁带半导体材料与器件教育部重点实验室, 西安 710071 |
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| 基金项目： | 国家自然科学基金资助项目（61106106）；中央高校基本科研业务费专项基金（K5051325002，K50511250008）。 |
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| 摘 要： | 作为现代电力电子核心器件之一的P沟道VDMOS （vertical double-diffuse，MOS）器件，一直以来由于应用领域狭窄而并未得到足够的研究。以P沟道VDMOS器件为研究对象，为一款击穿电压超过-200 V的P沟道VDMOS设计了有源区的元胞结构及复合耐压终端结构，并开发了一套完整的P沟道VDMOS专用非自对准工艺流程。最后通过仿真得到器件的击穿电压超过-200 V，阈值电压为-2.78 V，完全满足了设计要求，也为下一步流片提供了有益的参考。
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| 关 键 词： | P沟道VDMOS 击穿电压 导通电阻 阈值电压 |
| 收稿时间： | 2015/3/25 0:00:00 |
Design and process simulation of high voltage P-channel VDMOS |
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| PU Shi,DU Lin and ZHANG Dexi.Design and process simulation of high voltage P-channel VDMOS[J].Storage & Process,2016(4):133-138. |
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| Authors: | PU Shi DU Lin and ZHANG Dexi |
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| Institution: | Key Laboratory for Wide Band-gap Semiconductor Materials and Devices, Ministry of Education, Xidian University, Xi''an 710071, P. R. China,Key Laboratory for Wide Band-gap Semiconductor Materials and Devices, Ministry of Education, Xidian University, Xi''an 710071, P. R. China and Key Laboratory for Wide Band-gap Semiconductor Materials and Devices, Ministry of Education, Xidian University, Xi''an 710071, P. R. China |
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| Abstract: | As one of core devices in modern power semiconductor, P-channel VDMOS device has not been well researched for its narrow applications. We focused on the development of P-channel VDMOS device, designed a P-channel VDMOS with breakdown voltage over -200 V, including the active region cell structure and the junction termination structure, and developed a non-self-aligned progress flow for P channel VDMOS. Simulation results show that the breakdown voltage of the device is over -200 V and the threshold voltage is -2.78 V. The results meet the design requirements, and the research can provide references for the device fabrication. |
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| Keywords: | P-channel VDMOS breakdown voltage on-resistance threshold voltage |
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