基于FPGA与PCI总线接口的身份认证智能卡的设计

身份认证是保密通信和信息安全的基础,一直是网络安全研究重点。PCI 总线是一种高性能外围设备互连总线,由于 PCI 总线协议的复杂性,其接口实现比较困难。为此,开发了一种基于 FPGA 与PCI 总线接口的身份认证智能卡;介绍了 FPGA 与 PCI 总线接口的设计要点。     

一种基于FPGA的多DSP并行处理系统的设计

为了满足实时信号处理对处理速度的需求,提出了一种基于 FPGA 的多 DSP 并行处理系统。该系统由 DSP 和 FPGA 相结合构成一种处理平台,多 DSP 通过 HPI 接口进行通信,实现了多 DSP 并行处理。并给出了系统设计原理图。经验证该系统具有实时性好,数据传输速率高等优点。     

一种数控测井地面系统采集箱的设计

数控测井地面系统在石油勘探开发中发挥着重要作用,而采集箱是数控测井地面系统的核心箱体。介绍了数控测井地面系统采集箱的一种设计方法,该采集箱以 FPGA 芯片和 ARM 嵌入式芯片为核心芯片,以以太网为采集箱板卡与数控测井地面系统的主机之间的通讯媒介。与同类采集箱相比,该采集箱有更高的集成度和更快的通讯速率。     

基于FPGA串并结合FIR滤波器的设计

根据FIR滤波器的特性和分布式(DA)算法的特点,基于FPGA实现FIR滤波器的原理和方法,在拆分查找表的基础上,利用串并结合DA算法对数字滤波器的设计进行优化,设计更高阶次的滤波器并节省所占用的硬件资源.采用串并结合DA算法设计了16阶FIR低通滤波器,在Quartus Ⅱ 7.0下进行仿真,结果验证了该方法滤波效果好,能够有效地减少FPGA硬件资源的使用,提高FIR的运算速度.     

Application of Improved Fast-LADT Arithmetic Based on FPGA

This paper puts forward an improved fast-LADT arithmetic in application of electrocardiogram(ECG) compression.The arithmetic has much less mathematical operation and much easier to be implemented in hardware.With the artificial and experimental verification,it turns to be that the arithmetic keeps rather high compress ratio,has the advantages of small distortion and has the nicer results in real tine.The hardware system of ECG data compression is designed,implements the improved fast-LADT arithmetic,the experiment of ECG data compression also has been carried out,and the experiment results prove the validity of the arithmetic.     

Disign and Implementation of Speaker Recognition System Based on FPGA

Aiming at the shortcoming of low recognition and training speed in embedded speaker - recognition system based on DS Phard-core processor, a new scheme of system based on FPGA and vector quantization principle is presented. In the speaker-recognition system based on the vector quantization and generation algorithm, a fitness parallel process hardware structure is presented by the scheme which consumes much less time than software processing while getting the fitness. The test shows that the system uses this method obtains both high recognition rate and higher speed in training and recognition.     

一类基于FPGA的m序列发生器的设计

基于FPGA的存储器结构,设计了产生m序列的本原多项式的存储格式及其查询算法,并且提出了对任意级数n的m序列发生器的产生方法。试验表明,使用该方法实现的m序列发生器,结构简单,速度快,适用范围广。     

基于FPGA与PCI总线接口的身份认证智能卡的设计

身份认证是保密通信和信息安全的基础,一直是网络安全研究重点。PCI总线是一种高性能外围设备互连总线,由于PCI总线协议的复杂性,其接口实现比较困难。为此,开发了一种基于FPGA与PCI总线接口的身份认证智能卡;介绍了FPGA与PCI总线接口的设计要点。     

基于FPGA的信号发生器设计

作为调试设备,数字信号发生器是数字信号处理中不可缺少的一部分,广泛的应用在生产生活当中。由于FPGA集密度高,功耗低,体积小以及可靠性高等优点于一身,所以采用Altera公司生产的FPGA实现数字信号发生器的设计,该数字信号发生器能够产生可调频率的正弦波、方波、三角波和锯齿波。通过硬件系统测试,结果表明:系统精度较高、带负载能力较强、运行稳定。     

Multi channel cortical stimulator based on FPGA

A FPGA based multi channel cortical stimulator system for cortical visual prosthesis was designed. devised for generating a sequence of electrical pulses for cortical stimulation. The simulator is composed of a FPGA and voltage/current converters. The FPGA comprises a spike generator to generate various electrical pulse sequences and some multiplexers to select signals. The prototype based on an Altera Cyclone EP1C6 FPGA with four channels is developed to perform the experimental evaluation. Two electrode chips ane put out of the left and right dura of cortex of a cat. The electrical stimulation is connected to the left one, while the visual electrically evoked potential (EEP) is recorded by the right one. The experimental results on cat's cortex show that the cortex can respond to the current stimulation.